HalpIommuInitDiscard

INT64 __fastcall HalpIommuInitDiscard(INT64 a1){
  bool v2; 
  _QWORD *v3; 
  INT64 result; 
  INT64 v5; 
  int v6; 
  INT64 v7[2]; 
  HalpIommuParaVirtDeviceCacheLock = 0i64;
  HalpDeviceBlockUnblockPushLock = 0i64;
  HalpIommuDeviceCreatedListPushLock = 0i64;
  v2 = *(_BYTE *)HalpHvCpuManager == 0;
  v3 = (_QWORD *)HalIommuDispatch;
  qword_140C48A48 = (__int64)&HalpIommuParaVirtDeviceCache;
  HalpIommuParaVirtDeviceCache = (__int64)&HalpIommuParaVirtDeviceCache;
  qword_140C49BB8 = (__int64)&HalpIommuDeviceCreatedList;
  HalpIommuDeviceCreatedList = (__int64)&HalpIommuDeviceCreatedList;
  qword_140C49C08 = (__int64)&HalpRidAliasList;
  HalpRidAliasList = (__int64)&HalpRidAliasList;
  *(_QWORD *)(HalIommuDispatch + 8) = IommuGetConfiguration;
  v3[2] = IommuGetLibraryContext;
  v3[3] = IommuMapDevice;
  v3[4] = IommuEnableDevicePasid;
  v3[5] = IommuSetAddressSpace;
  v3[6] = IommuDisableDevicePasid;
  v3[7] = IommuUnmapDevice;
  v3[9] = IommuFlushTb;
  v3[10] = IommuFlushAllPasid;
  v3[11] = IommuProcessPageRequestQueue;
  v3[16] = IommuDevicePowerChange;
  v3[17] = IommuBeginDeviceReset;
  v3[18] = IommuFinalizeDeviceReset;
  *(_OWORD *)v7 = 0i64;
  HalpHvParaVirtIommuDomain = 0;
  HalpIommuDmaGuardTableOptIn = 0;
  HalpHvIommu = 0;
  if( !v2 )
  {
    HalpHvIommuDeviceDomain = ((unsigned int)EDX(__cpuid(1073741827, 0)) >> 24) & 1;
    HalpHvParaVirtIommuDomain = (EDX(__cpuid(1073741827, 0)) & 0x2000000) != 0;
    HviGetHardwareFeatures((INT64)v7);
    if( (v7[0] & 0x20) != 0 )
    {
      HalpHvIommu = 1;
      v3[1] = IommuHvGetConfiguration;
      v3[5] = IommuHvSetAddressSpace;
      v3[9] = IommuHvFlushTb;
      v3[10] = IommuHvFlushAllPasid;
      v3[16] = IommuHvDevicePowerChange;
    }
  }
  HalpIommuEnableGpuIdentityMapping = *(int *)(*(_QWORD *)(a1 + 240) + 132i64) < 0;
  result = HalpIommuRegisterBuiltinPlugins();
  v5 = HalpIommuList;
  if( (INT64 *)HalpIommuList != &HalpIommuList )
  {
    while( 1 )
    {
      v6 = *(_DWORD *)(v5 + 456);
      v5 = *(_QWORD *)v5;
      if( (v6 & 0x40) == 0 )
        break;
      if( (INT64 *)v5 == &HalpIommuList )
        return result;
    }
  }
  HalpInterruptX2ApicPolicy = 0;
  return result;
}

Referenced by: